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TRIAS Romania (“TRIAS microelectronics SRL”) is a regional sales office, responsible with distribution of CAD/EDA/PLM software in South-Eastern Europe covering the territories Romania, Bulgaria, Serbia, Macedonia, Montenegro and Albania.

We are the authorized distributor (in the above countries) of Mentor Graphics (www.mentor.com), Downstream Technologies (www.downstreamtech.com) and Omnify Software (www.omnifysoftware.com).

TRIAS Romania is also a technical competence center, offering:
  • Technical support services
  • Product trainings
  • Design support services
Our team is well trained and with several years of experience in the following engineering areas and software tools:
  • PCB design, Signal & Power Integrity simulation (PADS, Expedition, HyperLynx, CAM350, Blueprint)
  • FPGA design and verification (HDL Designer, Modelsim/Questa, Precision Synthesis)
  • Cabling & harness design (VeSys, Capital)
All the team-members of our technical staff have at least a degree in electronics, some of them holding master and PhD degrees.

We are operating since 2006 in Iasi, Romania.


 
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Upcoming Events
  • DVCON Europe 2016
    Design and Verification Conference and Exhibition
    • 19. – 20. Oktober 2016 in München

      DVCon Europe 2016 attendees have the opportunity to take part in the many informal, but often intense, technical discussions that pop-up around the conference venue among 500+ design and verification engineers and engineering managers. This networking opportunity among peers is possibly the greatest benefit to DVCon Europe attendees. Finally,  attendees have access to the vendors of advanced design and verification tools, IP/VIP and services who exhibit at the conference.

      TRIAS wird dort als Aussteller und über unseren Partner Bitvis / UVVM Vortragender "Advanced verification methodology UVVM in VHDL for complex FPGA designs" sein.


      Weitere Informationen finden Sie unter
 
Upcoming Education & Training
  • SystemVerilog – Advanced Verification for FPGA Design
    • May 10 – 12, 2016
    • Sep 13 – 15, 2016
    • Other dates & locations on request

    View Details
  • VHDL - 2008 / OSVVM
    • June 22 – 23, 2016
    • Oct 05 – 06, 2016
    • Nov 30 – Dec 01, 2016
    • Other dates & locations on request

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  • Verilog for VHDL User
    • Dates & locations on request

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  • Accelerating FPGA and Digital ASIC Design
    • Nov 02 – 03, 2016
    • Other dates & locations on request

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  • Accelerating FPGA VHDL Verification
    • Oct 04 – 06, 2016
    • Dec 06 – 08, 2016
    • Other dates & locations on request

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  • Signal Integrity for Hardware Designer
    • May 24 – 26, 2016
    • Oct 11 – 13, 2016
    • Other dates & locations on request

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  • Signal Integrity: High-Speed Memory Interfaces
    • June 08 – 09, 2016
    • Nov 01 – 02, 2016
    • Other dates & locations on request

    View Details
 
Upcoming Web Seminars
 
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